What is astable multivibrator mode of 555 timer IC?
Astable Multivibrator using 555 Timer | Circuit, Duty Cycle, Applications
Astable Multivibrator Mode of 555 Timer IC:
The control voltage applied at pin 5 will change the threshold voltage level. But for normal use, pin 5 is connected to ground via a capacitor (usually 0.01µF), so the external noise from the terminal is filtered out. Pin 1 is ground terminal. The timing circuit that determines the width of the output pulse is made up of R1, R2 and C.
Operation
The following schematic depicts the internal circuit of the IC 555 operating in astable mode. The RC timing circuit incorporates R1, R2 and C.
This high output will turn OFF the transistor. As a result, the capacitor C starts charging through the resistors R1 and R2. Now, the capacitor voltage is same as the threshold voltage (as pin 6 is connected to the capacitor resistor junction). While charging, the capacitor voltage increases exponentially towards VCC and the moment it crosses 2/3 VCC, which is the reference voltage to threshold comparator (comparator 1), its output becomes high.
As a result, the flip-flop is RESET. The output of the timer falls to LOW. This low output will once again turn on the transistor which provides a discharge path to the capacitor. Hence the capacitor C will discharge through the resistor R2. And hence the cycle continues.
Thus, when the capacitor is charging, the voltage across the capacitor rises exponentially and the output voltage at pin 3 is high. Similarly, when the capacitor is discharging, the voltage across the capacitor falls exponentially and the output voltage at pin 3 is low. The shape of the output waveform is a train of rectangular pulses. The waveforms of capacitor voltage and the output in the astable mode are shown below.
Duty Cycle
The charging and discharging time constants depends on the values of the resistors R1 and R2. Generally, the charging time constant is more than the discharging time constant. Hence the HIGH output remains longer than the LOW output and therefore the output waveform is not symmetric. Duty cycle is the mathematical parameter that forms a relation between the high output and the low output. Duty Cycle is defined as the ratio of time of HIGH output i.e., the ON time to the total time of a cycle.
If TON is the time for high output and T is the time period of one cycle, then the duty cycle D is given by:
D = TON/ T
Therefore, percentage Duty Cycle is given by:
%D = (TON / T) * 100
T is sum of TON (charge time) and TOFF (discharge time).
The value of TON or the charge time (for high output) TC is given by:
TON = TC = 0.693 * (R1 + R2) C
The value of TOFF or the discharge time (for low output) TD is given by
TOFF = TD = 0.693 * R2C
Therefore, the time period for one cycle T is given by
T = TON + TOFF = TC + TD
T = 0.693 * (R1 + R2) C + 0.693 * R2C
T = 0.693 * (R1 + 2R2) C
Therefore, %D = (TON/ T) * 100
%D = (0.693 * (R1 + R2) C)/(0.693 * (R1 + 2R2) C) * 100
%D = ((R1 + R2)/(R1 + 2R2)) * 100
If T = 0.693 * (R1 + 2R2) C, then the frequency f is given by
f = 1 / T = 1 / 0.693 * (R1 + 2R2) C
f = 1.44/( (R1 + 2R2) C) Hz
Selection of R1, R2 and C1
The Selection of values of R1, R2 and C1 for different frequency range are as follow:
R1 and R2 should be in the range 1KΩ to 1MΩ. It is best to Choose C1 first (because capacitors are available in just a few values and are usually not adjustable, unlike resistors) as per the frequency range from the following table.
Choose R2 to give the frequency (f) you require.
R2 = 0.7 /(f × C1)
Choose R1 to be about a tenth of R2 (1KΩ min.)
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